The Hong Kong and China Gas Company Limited (“Towngas”), together with a number of industry-leading enterprises and institutions, announced the official launch of the Hong Kong RISC-V Alliance (HKRVA) ...
The SSD is expected to achieve sequential read speeds of 11.4 GB/s, which is unprecedented for QLC NAND flash, expected to ...
Morning Overview on MSN
Samsung readies PCIe 5.0 QLC SSD with a RISC-V based controller
Samsung is preparing a PCIe 5.0 SSD that pairs quad-level cell (QLC) flash memory with a RISC-V-based controller, a ...
GigaDevice is demonstrating four application areas at Embedded World 2026 (Hall 5, Stand 5-129) built around its GD32 MCU ...
Alibaba has revealed a new server chip that it says is the most powerful processor ever to use the RISC-V instruction set.
It seems every day there’s a new microcontroller announcement for which the manufacturer is keen to secure your eyeballs. Today it’s the turn of Espressif, whose new part is the ESP32-P4, which ...
Samsung announces a first SSD with RISC-V cores in its controller. The manufacturer promises higher efficiency.
Linea, the Ethereum Layer 2 network developed by ConsenSys, is transitioning from direct EVM arithmetization to a RISC-V-based proving architecture. The team spent three years building one of the most ...
The Xiangshan high-performance processor is the latest effort from China to push the boundaries with RISC-V architecture.
Forbes contributors publish independent expert analyses and insights. Marco Chiappetta is a technologist who covers semiconductors and AI. In recent years, the RISC-V architecture has gained ...
Nothing ever made is truly perfect and indeed, CPU architectures like x86, RISC-V, ARM, and PowerPC all have their own ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results